1. Field of the Invention
This invention relates to a regulated voltage supply circuit adapted for use with a CMOS chip, and in particular a regulated voltage circuit adapted to provide a voltage which is parameter determined so as to optimally operate CMOS transistors on the chip in a stable high gain mode of operation.
2. Background
The advantages of CMOS circuitry are well known in the art. Particularly for low power applications such as implantable pacemakers, CMOS circuitry is ideally suited because it provides excellent digital logic circuitry, as well as analog circuitry, with the lowest power drain of available electronic configurations. There are many commercial applications requiring one or more CMOS chips, each chip comprising a large scale integrated circuit having spread out or dispersed thereon a great number of different circuits. Most CMOS circuits which provide logic functions, such as gates, conduct only when they are actually switching, at which time both transistors of the pair conduct. This is the primary reason why CMOS circuits require minimal power. However, at the time of switching, the voltage-current operation of each transistor depends upon the supply voltage which is impressed across the CMOS pair. Depending upon the logic function being performed, a circuit designer will want to control that current to correspond to a particular range on the transistor voltage-current characteristic curve. Accordingly, the CMOS transistors can be current controlled in an optimum fashion only by controlling the voltage which is applied to the CMOS pair. This can lead to design difficulties where different CMOS pairs should be driven at different current levels, since an arbitrary voltage will not be optimized for different MOS transistors.
In applications where a CMOS chip contains both digital and analog circuits, the problem of providing the best voltage for the CMOS pairs is increased due to the larger current flow of the analog circuits. As is known, when CMOS pairs are used for analog functions, such as in conventional amplifier stages, current is flowing continuously when the circuit is in operation, making the need of current control even more critical. The current through the CMOS pair, and thus the voltage supplied across it, must be stabilized and controlled in order to achieve high gain, controlled bandwidth and circuit stability. If the supply voltage is not adjusted properly and is too high, the transistors, and thus the amplifier may operate in a strong inversion condition, which results in a relatively high current, low gain operation. Or, if the voltage is too low, the transistors may operate with as low current and an undefined low gain.
From the above, it is seen that there is a substantial problem in designing CMOS circuitry, and providing a regulated voltage suitable for all the requirements of the various circuits on a single chip. The problem is compounded in applications where a plurality of CMOS chips are employed, since each chip will have slightly different process-variable parameters. Specifically, the threshold voltage V.sub.gs of each CMOS transistor is processvariable, and the designer must take into account the possibility of statistical variations from chip to chip. Accordingly, a single regulated voltage which is applied to the same CMOS circuits on different chips will likely result in different operating conditions for the different CMOS circuits.
Another well known need in the art is that of conserving space, or "real estate" on the chip. Considerable time and expense goes into the process of laying out or designing a chip, so as to efficiently achieve the highest density of functional circuits per chip. Again referring to the implantable pacemaker illustration, where physical space is at a premium, it is important to minimize the number of chips which must be packaged in the pacemaker, simply to conserve space. Also, as a general proposition for any application, the expense involved is proportional to the number of chips that are utilized and have to be manufactured. There is thus a substantial need for a design which minimizes the circuitry needed to efficiently provide power and proper voltages to all the CMOS circuits on the chip or chips being used. For example, it would be very inefficient from a design point of view to have a large number of different regulated voltages available, which would have to be provided by a plulrality of supply voltage lines. Likewise, and particularly in low power applications such as implantable pacemakers, resistors frequently cannot be incorporated into the design because of the extremely high values which are needed, which values cannot be obtained on a chip. This problem can be solved by utilizing a current source or sink in place of a desired high resistor element. However, the system must avoid the need for a large number of current paths which, if utilized, would take up a great deal of space on the chip.